Programmable integrated circuit devices (programmable ICs) are a well-known type of integrated circuit that can be programmed to perform specified logic functions. One type of programmable IC, the field programmable gate array (FPGA), typically includes an array of programmable tiles. These programmable tiles can include, for example, input/output blocks (IOBs), configurable logic blocks (CLBs), dedicated random access memory blocks (BRAM), multipliers, digital signal processing blocks (DSPs), processors, clock managers, delay lock loops (DLLs), and so forth.
Each programmable tile typically includes both programmable interconnect and programmable logic. The programmable interconnect typically includes a large number of interconnect lines of varying lengths interconnected by programmable interconnect points (PIPs). The programmable logic implements the logic of a user design using programmable elements that can include, for example, function generators, registers, arithmetic logic, and so forth.
The programmable interconnect and programmable logic are typically programmed by loading a stream of configuration data into internal configuration memory cells that define how the programmable elements are configured. The configuration data can be read from memory (e.g., from an external PROM) or written into the FPGA by an external device. The collective states of the individual memory cells then determine the function of the FPGA.
Other types of programmable ICs can include complex programmable logic devices (CPLDs), programmable logic arrays (PLAs), and programmable array logic (PAL) devices. For all of these programmable IC, the functionality of the device can be controlled by data bits provided to the device for that purpose. The data bits can be stored in volatile memory (e.g., static memory cells, as in FPGAs and some CPLDs), in non-volatile memory (e.g., FLASH memory, as in some CPLDs), or in any other type of memory cell.
Other programmable ICs can be programmed by applying a processing layer, such as a metal layer, that programmably interconnects the various elements on the device. These programmable ICs are known as mask programmable devices. Programmable ICs can also be implemented in other ways, e.g., using fuse or antifuse technology. The phrase “programmable IC,” refers to these devices and further may encompass other devices that are only partially programmable. For example, one type of programmable IC can include a combination of hard-coded transistor logic and a programmable switch fabric that programmably interconnects the hard-coded transistor logic.
Since programmable ICs provide a robust platform upon which complex systems may be built, these devices have become widely used in system development. Such is the case whether one is prototyping a system or creating the end product for release. This is particularly true of programmable ICs that include embedded processors. Some programmable ICs include a “hard” processor that is implemented within the device with preconfigured circuitry. That is, the programmable IC includes physical, preconfigured circuitry implementing the processor. No programming of the programmable logic is required. In other cases, the programmable ICs may include a “soft” processor. A soft processor is one that is implemented using the programmable fabric of the programmable IC by loading the appropriate configuration data into the device.
Often, peripheral devices communicate with the embedded processor, whether a soft processor or a hard processor, through a shared bus. A shared bus refers to a bus over which a plurality of different devices or peripherals may communicate with the processor. In general, shared buses can support burst transfers of data. A “burst transfer operation” or “bursting data” refers to sending one memory address and either sending a plurality of data words to be written beginning at the memory address or reading a plurality of words beginning at the memory address.
Burst transfers of data between a processor and another device over a shared bus, however, typically require a significant amount of control signals to be exchanged. This exchange of control signals, also referred to as “handshaking,” adds complexity to any device with which the processor communicates. This “complexity” translates into system overhead in several ways including, but not limited to, the amount of hardware necessary to implement the control signaling, the bandwidth required to support the control signaling, and the time necessary to process the control signals. The complexity of supporting bust transfers of data over a shared bus also extends to the processor. Any processor that is to support burst data transfers on a shared bus must include specialized instructions, or functionality, for performing that task.